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PlantUml

Skinparam

With the skinparam you can change the feel and design of the whole Diagram

Shadows

skinparam shadowing false

Colors

@startuml
colors
@enduml

Black and White

skinparam monochrome true
@startuml

skinparam monochrome true
skinparam shadowing false

actor User
participant "First Class" as A
participant "Second Class" as B
participant "Last Class" as C

User -> A: DoWork
activate A

A -> B: Create Request
activate B

B -> C: DoWork
activate C
C --> B: WorkDone
destroy C

B --> A: Request Created
deactivate B

A --> User: Done
deactivate A

@enduml
UserUserFirst ClassFirst ClassSecond ClassSecond ClassLast ClassLast ClassDoWorkCreate RequestDoWorkWorkDoneRequest CreatedDone
UserUserFirst ClassFirst ClassSecond ClassSecond ClassLast ClassLast ClassDoWorkCreate RequestDoWorkWorkDoneRequest CreatedDone

White and Black

skinparam monochrome reverse
@startuml

skinparam monochrome reverse
skinparam shadowing false

actor User
participant "First Class" as A
participant "Second Class" as B
participant "Last Class" as C

User -> A: DoWork
activate A

A -> B: Create Request
activate B

B -> C: DoWork
activate C
C --> B: WorkDone
destroy C

B --> A: Request Created
deactivate B

A --> User: Done
deactivate A

@enduml
UserUserFirst ClassFirst ClassSecond ClassSecond ClassLast ClassLast ClassDoWorkCreate RequestDoWorkWorkDoneRequest CreatedDone
UserUserFirst ClassFirst ClassSecond ClassSecond ClassLast ClassLast ClassDoWorkCreate RequestDoWorkWorkDoneRequest CreatedDone

Sequence Diagram

participant Alice
participant "The **Famous** Bob" as Bob

Alice -> Bob : hello --there--
... Some ~~long delay~~ ...
Bob -> Alice : ok
note left
  This is **bold**
  This is //italics//
  This is ""monospaced""
  This is --stroked--
  This is __underlined__
  This is ~~waved~~
end note

Alice -> Bob : A //well formatted// message
note right of Alice
This is <back:cadetblue><size:18>displayed</size></back>
__left of__ Alice.
end note
note left of Bob
<u:red>This</u> is <color #118888>displayed</color>
**<color purple>left of</color> <s:red>Alice</strike> Bob**.
end note
note over Alice, Bob
<w:#FF33FF>This is hosted</w> by <img img/plantuml-logo.png>
end note
AliceAliceTheFamousBobTheFamousBobhellothereSomelong delay okThis isboldThis isitalicsThis ismonospacedThis isstrokedThis isunderlinedThis iswavedAwell formattedmessageThis isdisplayedleft ofAlice.Thisisdisplayedleft of AliceBob.This is hostedby(Cannot decode)
AliceAliceTheFamousBobTheFamousBobhellothereSomelong delay okThis isboldThis isitalicsThis ismonospacedThis isstrokedThis isunderlinedThis iswavedAwell formattedmessageThis isdisplayedleft ofAlice.Thisisdisplayedleft of AliceBob.This is hostedby(Cannot decode)

Use Case Diagram

Main AdminUse the applicationUserStartThis is an example.A note can alsobe on several linesThis note is connectedto several objects.
Main AdminUse the applicationUserStartThis is an example.A note can alsobe on several linesThis note is connectedto several objects.

Class Diagram

Object <|-- ArrayList

Object : equals()
ArrayList : Object[] elementData
ArrayList : size()
Objectequals()ArrayListObject[] elementDatasize()
Objectequals()ArrayListObject[] elementDatasize()
class Foo1 {
  You can use
  several lines
  ..
  as you want
  and group
  ==
  things together.
  __
  You can have as many groups
  as you want
  --
  End of class
}

class User {
  .. Simple Getter ..
  + getName()
  + getAddress()
  .. Some setter ..
  + setName()
  __ private data __
  int age
  -- encrypted --
  String password
}
Foo1You can useseveral linesas you wantand groupthings together.You can have as many groupsas you wantEnd of classUsergetName()getAddress()Simple GettersetName()Some setterint ageprivate dataString passwordencrypted
Foo1You can useseveral linesas you wantand groupthings together.You can have as many groupsas you wantEnd of classUsergetName()getAddress()Simple GettersetName()Some setterint ageprivate dataString passwordencrypted

Activity Diagram

(*) --> "Initialization"

if "Some Test" then
  -->[true] "Some Activity"
  --> "Another activity"
  -right-> (*)
else
  ->[false] "Something else"
  -->[Ending process] (*)
endif
InitializationSome ActivityAnother activitySomething elseSome TesttruefalseEnding process
InitializationSome ActivityAnother activitySomething elseSome TesttruefalseEnding process
title Servlet Container

(*) --> "ClickServlet.handleRequest()"
--> "new Page"

if "Page.onSecurityCheck" then
  ->[true] "Page.onInit()"

  if "isForward?" then
  ->[no] "Process controls"

  if "continue processing?" then
  -->[yes] ===RENDERING===
  else
  -->[no] ===REDIRECT_CHECK===
  endif

  else
  -->[yes] ===RENDERING===
  endif

  if "is Post?" then
  -->[yes] "Page.onPost()"
  --> "Page.onRender()" as render
  --> ===REDIRECT_CHECK===
  else
  -->[no] "Page.onGet()"
  --> render
  endif

else
  -->[false] ===REDIRECT_CHECK===
endif

if "Do redirect?" then
->[yes] "redirect request"
--> ==BEFORE_DESTROY===
else
if "Do Forward?" then
  -left->[yes] "Forward request"
  --> ==BEFORE_DESTROY===
else
  -right->[no] "Render page template"
  --> ==BEFORE_DESTROY===
endif
endif

--> "Page.onDestroy()"
-->(*)
Servlet ContainerServlet ContainerClickServlet.handleRequest()new PagePage.onInit()Process controlsPage.onPost()Page.onRender()Page.onGet()redirect requestForward requestRender page templatePage.onDestroy()Page.onSecurityChecktrueisForward?nocontinue processing?yesnoyesis Post?yesnofalseDo redirect?yesDo Forward?yesno
Servlet ContainerServlet ContainerClickServlet.handleRequest()new PagePage.onInit()Process controlsPage.onPost()Page.onRender()Page.onGet()redirect requestForward requestRender page templatePage.onDestroy()Page.onSecurityChecktrueisForward?nocontinue processing?yesnoyesis Post?yesnofalseDo redirect?yesDo Forward?yesno

MindMaps

@startmindmap
+ OS
++ Ubuntu
+++ Linux Mint
+++ Kubuntu
+++ Lubuntu
+++ KDE Neon
++ LMDE
++ SolydXK
++ SteamOS
++ Raspbian
-- Windows 95
-- Windows 98
-- Windows NT
--- Windows 8
--- Windows 10
@endmindmap
OSUbuntuLinux MintKubuntuLubuntuKDE NeonLMDESolydXKSteamOSRaspbianWindows 95Windows 98Windows NTWindows 8Windows 10
OSUbuntuLinux MintKubuntuLubuntuKDE NeonLMDESolydXKSteamOSRaspbianWindows 95Windows 98Windows NTWindows 8Windows 10
@startmindmap

<style>
mindmapDiagram {
  .pink {
    BackgroundColor #da6d9c
  }
  .pink_alt {
    BackgroundColor #cc5254
  }
  .pink_alt2 {
    BackgroundColor #B02b56
  }
  .yellow {
    BackgroundColor #f5c400
  }
  .green {
    BackgroundColor #00925a
  }
  .blue {
    BackgroundColor #0095d8
  }
  .orange {
    BackgroundColor #eb6a28
  }
}
</style>

* Infotronics \n Engineer Everything <<pink>>
** Computer Science <<pink_alt>>
***_ Machine Learning
***_ Data Science
***_ Algorithms
** Operational Technology (OT) <<>>
***_ Robust Software
***_ Security
***_ Industry 4.0
** Electronics <<green>>
***_ Electronic Circuits
***_ Embedded Systems
***_ Wireless Communication
** Systems Engineering <<yellow>>
***_ Programming
***_ Model-Driven Development
***_ System On Chip
left side
** Industrial Applications <<blue>>
***_ Industrial Control Systems
***_ Cyber-Physical Systems
***_ Robotics
** Constrained Systems <<orange>>
***_ IoT (Internet of Things)
***_ IIoT (Industrial Internet of Things)
***_ Security-related Systems
***_ Space Applications
** Real-Time Programming <<pink_alt2>>
***_ Real-Time Operating Systems
***_ Communication Protocols
***_ Deterministic Applications
@endmindmap
InfotronicsEngineer EverythingComputer ScienceMachine LearningData ScienceAlgorithmsOperational Technology (OT)Robust SoftwareSecurityIndustry 4.0ElectronicsElectronic CircuitsEmbedded SystemsWireless CommunicationSystems EngineeringProgrammingModel-Driven DevelopmentSystem On ChipIndustrial ApplicationsIndustrial Control SystemsCyber-Physical SystemsRoboticsConstrained SystemsIoT (Internet of Things)IIoT (Industrial Internet of Things)Security-related SystemsSpace ApplicationsReal-Time ProgrammingReal-Time Operating SystemsCommunication ProtocolsDeterministic Applications
InfotronicsEngineer EverythingComputer ScienceMachine LearningData ScienceAlgorithmsOperational Technology (OT)Robust SoftwareSecurityIndustry 4.0ElectronicsElectronic CircuitsEmbedded SystemsWireless CommunicationSystems EngineeringProgrammingModel-Driven DevelopmentSystem On ChipIndustrial ApplicationsIndustrial Control SystemsCyber-Physical SystemsRoboticsConstrained SystemsIoT (Internet of Things)IIoT (Industrial Internet of Things)Security-related SystemsSpace ApplicationsReal-Time ProgrammingReal-Time Operating SystemsCommunication ProtocolsDeterministic Applications

WBS Work Breakdown Structure

@startwbs
* Business Process Modelling WBS
** Launch the project
*** Complete Stakeholder Research
*** Initial Implementation Plan
** Design phase
*** Model of AsIs Processes Completed
**** Model of AsIs Processes Completed1
**** Model of AsIs Processes Completed2
*** Measure AsIs performance metrics
*** Identify Quick Wins
** Complete innovate phase
@endwbs
Launch the projectComplete Stakeholder ResearchInitial Implementation PlanDesign phaseModel of AsIs Processes CompletedModel of AsIs Processes Completed1Model of AsIs Processes Completed2Measure AsIs performance metricsIdentify Quick WinsComplete innovate phaseBusiness Process Modelling WBS
Launch the projectComplete Stakeholder ResearchInitial Implementation PlanDesign phaseModel of AsIs Processes CompletedModel of AsIs Processes Completed1Model of AsIs Processes Completed2Measure AsIs performance metricsIdentify Quick WinsComplete innovate phaseBusiness Process Modelling WBS

GANTT Chart

@startgantt
Project starts 2020/05/01
saturday are closed
sunday are closed
Project starts the 1th of may 2020
[Test prototype] lasts 10 days
[Prototype completed] happens at [Test prototype]'s end
[Setup assembly line] lasts 12 days
[Setup assembly line] starts at [Test prototype]'s end
@endgantt
FrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMo123456789101112131415161718192021222324252627282930311May 2020JunTest prototypePrototype completedSetup assembly lineFrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMo123456789101112131415161718192021222324252627282930311May 2020Jun
FrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMo123456789101112131415161718192021222324252627282930311May 2020JunTest prototypePrototype completedSetup assembly lineFrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMoTuWeThFrSaSuMo123456789101112131415161718192021222324252627282930311May 2020Jun
@startgantt
project starts 2021/06/01
saturday are closed
sunday are closed
printscale weekly

[WP1 Literature Research] starts at 2021/06/01
[WP1 Literature Research] lasts 3 weeks

[WP2 External Survey] starts at [WP1 Literature Research]'s start
[WP2 External Survey] ends at [WP1 Literature Research]'s end

[WP3 Synthesising State of the Art] starts at [WP2 External Survey]'s end
[WP3 Synthesising State of the Art] lasts 2 weeks

[Theoretical research completed] happens at [WP3 Synthesising State of the Art]'s end

[WP4 Selection practial application] starts at [WP3 Synthesising State of the Art]'s end
[WP4 Selection practial application] lasts 2 week

[WP5 Data Collection] starts at [WP4 Selection practial application]'s end
[WP5 Data Collection] lasts 3 weeks

[WP6 ML Model Selection] starts at [WP4 Selection practial application]'s end
[WP6 ML Model Selection] lasts 2 weeks

[WP7 ML Model Implementation] starts at [WP6 ML Model Selection]'s end
[WP7 ML Model Implementation] lasts 5 weeks

[Implementation completed] happens at [WP7 ML Model Implementation]'s end

[WP8 Fieldtest] starts at [WP7 ML Model Implementation]'s end
[WP8 Fieldtest] ends at 2021/09/30

[Write Thesis Report] starts at 2021/06/01
[Write Thesis Report] ends at 2021/09/30

' Color definitions
[WP1 Literature Research] is colored in LightSteelBlue/DimGrey
[WP2 External Survey] is colored in LightSteelBlue/DimGrey
[WP3 Synthesising State of the Art] is colored in LightSteelBlue/DimGrey
[WP4 Selection practial application] is colored in LightGreen/DimGrey
[WP5 Data Collection] is colored in LightGreen/DimGrey
[WP6 ML Model Selection] is colored in LightGreen/DimGrey
[WP7 ML Model Implementation] is colored in LightGreen/DimGrey
[WP8 Fieldtest] is colored in SandyBrown/Sienna

[Write Thesis Report] is colored in LightSteelBlue/DimGrey

@endgantt
2324252627282930313233343536373839Jun 2021Jul 2021Aug 2021Sep 2021WP1 Literature ResearchWP2 External SurveyWP3 Synthesising State of the ArtTheoretical research completedWP4 Selection practial applicationWP5 Data CollectionWP6 ML Model SelectionWP7 ML Model ImplementationImplementation completedWP8 FieldtestWrite Thesis ReportJun 2021Jul 2021Aug 2021Sep 2021
2324252627282930313233343536373839Jun 2021Jul 2021Aug 2021Sep 2021WP1 Literature ResearchWP2 External SurveyWP3 Synthesising State of the ArtTheoretical research completedWP4 Selection practial applicationWP5 Data CollectionWP6 ML Model SelectionWP7 ML Model ImplementationImplementation completedWP8 FieldtestWrite Thesis ReportJun 2021Jul 2021Aug 2021Sep 2021

Timing Diagram

@startuml
clock clk with period 1
binary "Enable" as EN

@0
EN is low

@5
EN is high

@10
EN is low
@enduml
Enable01510
Enable01510